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Tuesday, October 13, 10:50, Room “A”
RF & POWER DEVICES
Session D: Oral presentations
Chair:
F. Udrea, University of Cambridge, UK.
D. Dobrescu, “Politehnica” University of Bucharest, Romania
D.1
10:50 |
A SIMPLE APPROACH FOR DMOS TRANSISTOR MODELING UP TO VERY HIGH TEMPERATURES, M. Pfost, D. Costachescu, A. Podgaynaya*, M. Stecher*, Infineon Technologies Romania, Bucharest, Romania, *Infineon Technologies AG, Neubiberg, Germany. |
D. 2
11:10 |
ADVANCED CARRIER DENSITY ENHANCEMENT TECHNOLOGIES IN INSULATED GATE BIPOLAR TRANSISTORS, W. Chih-Wei Hsu, F. Udrea, H.-T. Chen*, W.-C. Lin*, Univ. of Cambridge, UK, *ANPEC Electronics Corp., Taiwan. |
D. 3
11:30 |
CMOS RF ACTIVE INDUCTOR WITH IMPROVED TUNING CAPABILITY,
C. Andriesei1,2, L. Goras1,3, F. Temcamani2,
B. Delacressoniere2, 1“Gh. Asachi” Technical Univ., Iasi, Romania, 2ECIME/ETIS Lab., ENSEA, Cergy, France, 3Inst. of Computer Science, Iasi, Romania. |
D. 4
11:50 |
FIVE CURRENT STEPS TOPOLOGY FOR GATE CHARGING TO IMPROVE EMC BEHAVIOR, L. Creosteanu, A. Danchiv,
G. Brezeanu*, Infineon Technologies Romania, Bucharest, *“Politehnica” Univ. of Bucharest, Romania. |
D. 5
12:10 |
SPICE EMULATOR FOR BREAKDOWN MODE OPERATION OF THE GATE-CONTROLLED DIODE, A. Rusu, D. Dobrescu, Alex. Rusu, D. Cozma, “Politehnica” Univ. of Bucharest, Romania. |
D. 6
12:30 |
LIMITATIONS OF THE OPEN-CIRCUIT VOLTAGE DECAY TECHNIQUE APPLIED TO 4H-SiC DIODES, S. Bellone, L.F. Albanese, G.D. Licciardo, Univ. of Salerno, Fisciano, Italy. |
D. 7
12:50 |
EFFECTS OF PROCESS VARIATIONS ON THE CURRENT IN SCHOTTKY BARRIER SOURCE-GATED TRANSISTORS, R.A. Sporea1, X. Guo1,2, J.M. Shannon1, S.R.P. Silva1, 1Univ. of Surrey, Guildford, UK, 2Jiao Tong Univ., Shanghai, China. |
D.8
13:10 |
DESIGN CONSIDERATIONS FOR IMPROVED ELECTRO MAGNETIC COMPATIBILITY (EMC) BEHAVIOUR IN HIGH SIDE SWITCHES DESIGN, D. Dinu, B. Auer*, Infineon Technologies Romania, Bucharest, Romania, *Infineon Technologies Austria, Villach, Austria. |
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